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-rw-r--r--kernel/src/cpu/idt.c19
-rw-r--r--kernel/src/cpu/irq.c290
-rw-r--r--kernel/src/cpu/irq_stub.S56
-rw-r--r--kernel/src/cpu/pic.c12
4 files changed, 72 insertions, 305 deletions
diff --git a/kernel/src/cpu/idt.c b/kernel/src/cpu/idt.c
index e900c77..3578f53 100644
--- a/kernel/src/cpu/idt.c
+++ b/kernel/src/cpu/idt.c
@@ -8,7 +8,7 @@ idtp idt_pointer;
void load_idt(idtp* pointer)
{
- __asm__ volatile ("lidt (%0); sti;" : : "r"(pointer) : );
+ __asm__ volatile ("lidt (%0);" : : "r"(pointer) : );
}
void add_to_idt(uint16_t num, uint64_t offset, uint16_t selector, uint8_t type)
@@ -61,20 +61,9 @@ void init_idt_table(void)
// interrupts
add_to_idt(32, (uint64_t)irq0, GDT_CODE_SEG, INTERRUPT_GATE);
add_to_idt(33, (uint64_t)irq1, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(34, (uint64_t)irq2, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(35, (uint64_t)irq3, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(36, (uint64_t)irq4, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(37, (uint64_t)irq5, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(38, (uint64_t)irq6, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(39, (uint64_t)irq7, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(40, (uint64_t)irq8, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(41, (uint64_t)irq9, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(42, (uint64_t)irq10, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(43, (uint64_t)irq11, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(44, (uint64_t)irq12, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(45, (uint64_t)irq13, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(46, (uint64_t)irq14, GDT_CODE_SEG, INTERRUPT_GATE);
- add_to_idt(47, (uint64_t)irq15, GDT_CODE_SEG, INTERRUPT_GATE);
+ for (size_t i = 34; i < 256; i++) {
+ add_to_idt((uint16_t)i, (uint64_t)irq2, GDT_CODE_SEG, INTERRUPT_GATE);
+ }
}
void init_idt()
diff --git a/kernel/src/cpu/irq.c b/kernel/src/cpu/irq.c
index 4670da5..79498ba 100644
--- a/kernel/src/cpu/irq.c
+++ b/kernel/src/cpu/irq.c
@@ -9,6 +9,9 @@
#include <libk/serial_stdio.h>
#include <libk/stdio.h>
#include <panic.h>
+#include <apic.h>
+
+#define PIT 0
const char* const exception_name[] = {
"Divide-by-zero Error",
@@ -45,253 +48,42 @@ const char* const exception_name[] = {
"Reserved",
};
-void isr0_handler(void)
-{
- panic("%s\n", exception_name[0]);
-}
-
-void isr1_handler(void)
-{
- panic("%s\n", exception_name[1]);
-}
-
-void isr2_handler(void)
-{
- panic("%s\n", exception_name[2]);
-}
-
-void isr3_handler(void)
-{
- panic("%s\n", exception_name[3]);
-}
-
-void isr4_handler(void)
-{
- panic("%s\n", exception_name[4]);
-}
-
-void isr5_handler(void)
-{
- panic("%s\n", exception_name[5]);
-}
-
-void isr6_handler(void)
-{
- panic("%s\n", exception_name[6]);
-}
-
-void isr7_handler(void)
-{
- panic("%s\n", exception_name[7]);
-}
-
-void isr8_handler(uint64_t error)
-{
- panic("%s, error: %d\n", exception_name[8], error);
-}
-
-void isr9_handler(void)
-{
- panic("%s\n", exception_name[9]);
-}
-
-void isr10_handler(uint64_t error)
-{
- panic("%s, error: %d\n", exception_name[10], error);
-}
-
-void isr11_handler(uint64_t error)
-{
- panic("%s, error: %d\n", exception_name[11], error);
-}
-
-void isr12_handler(uint64_t error)
-{
- panic("%s, error: %d\n", exception_name[12], error);
-}
-
-void isr13_handler(uint64_t error)
-{
- panic("%s, error: %d\n", exception_name[13], error);
-}
-
-void isr14_handler(uint64_t error)
-{
- printf("%s, error: %d\n", exception_name[14], error);
- page_fault(error);
-}
-
-void isr15_handler(void)
-{
- panic("%s\n", exception_name[15]);
-}
-
-void isr16_handler(void)
-{
- panic("%s\n", exception_name[16]);
-}
-
-void isr17_handler(uint64_t error)
-{
- panic("%s, error: %d\n", exception_name[17], error);
-}
-
-void isr18_handler(void)
-{
- panic("%s\n", exception_name[18]);
-}
-
-void isr19_handler(void)
-{
- panic("%s\n", exception_name[19]);
-}
-
-void isr20_handler(void)
-{
- panic("%s\n", exception_name[20]);
-}
-
-void isr21_handler(uint64_t error)
-{
- panic("%s, error: %d\n", exception_name[21], error);
-}
-
-void isr22_handler(void)
-{
- panic("%s\n", exception_name[22]);
-}
-
-void isr23_handler(void)
-{
- panic("%s\n", exception_name[23]);
-}
-
-void isr24_handler(void)
-{
- panic("%s\n", exception_name[24]);
-}
-
-void isr25_handler(void)
-{
- panic("%s\n", exception_name[25]);
-}
-
-void isr26_handler(void)
-{
- panic("%s\n", exception_name[26]);
-}
-
-void isr27_handler(void)
-{
- panic("%s\n", exception_name[27]);
-}
-
-void isr28_handler(void)
-{
- panic("%s\n", exception_name[28]);
-}
-
-void isr29_handler(uint64_t error)
-{
- panic("%s, error: %d\n", exception_name[29], error);
-}
-
-void isr30_handler(uint64_t error)
-{
- panic("%s, error: %d\n", exception_name[30], error);
-}
-
-void isr31_handler(void)
-{
- panic("%s\n", exception_name[31]);
-}
-
-void irq0_handler(void)
-{
- timer_handler();
- outb(PIC1_COMMAND, PIC_EOI);
-}
-
-void irq1_handler(void)
-{
- keyboard_handler();
- outb(PIC1_COMMAND, PIC_EOI);
-}
-
-void irq2_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
-}
-
-void irq3_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
-}
-
-void irq4_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
-}
-
-void irq5_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
-}
-
-void irq6_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
-}
-
-void irq7_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
-}
-
-void irq8_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
- outb(PIC2_COMMAND, PIC_EOI);
-}
-
-void irq9_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
- outb(PIC2_COMMAND, PIC_EOI);
-}
-
-void irq10_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
- outb(PIC2_COMMAND, PIC_EOI);
-}
-
-void irq11_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
- outb(PIC2_COMMAND, PIC_EOI);
-}
-
-void irq12_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
- outb(PIC2_COMMAND, PIC_EOI);
-}
-
-void irq13_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
- outb(PIC2_COMMAND, PIC_EOI);
-}
-
-void irq14_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
- outb(PIC2_COMMAND, PIC_EOI);
-}
-
-void irq15_handler(void)
-{
- outb(PIC1_COMMAND, PIC_EOI);
- outb(PIC2_COMMAND, PIC_EOI);
+void isr_def_handler(uint64_t number, uint64_t error)
+{
+ switch(number) {
+ case 14:
+ printf("%s, error: 0x%x\n", exception_name[14], error);
+ page_fault(error);
+ break;
+ default:
+ panic("%s, error: 0x%x\n", exception_name[number], error);
+ }
+}
+
+void eoi(uint64_t number)
+{
+ if (PIT) {
+ if (number < 8) {
+ outb(PIC1_COMMAND, PIC_EOI);
+ } else if (number < 16) {
+ outb(PIC1_COMMAND, PIC_EOI);
+ outb(PIC2_COMMAND, PIC_EOI);
+ }
+ } else {
+ apic_eoi();
+ }
+}
+
+void irq_def_handler(uint64_t number)
+{
+ switch(number)
+ {
+ case 0:
+ timer_handler();
+ break;
+ case 1:
+ keyboard_handler();
+ break;
+ }
+ eoi(number);
}
diff --git a/kernel/src/cpu/irq_stub.S b/kernel/src/cpu/irq_stub.S
index ee02d3e..3ba4360 100644
--- a/kernel/src/cpu/irq_stub.S
+++ b/kernel/src/cpu/irq_stub.S
@@ -49,27 +49,41 @@
pop %rax
.endm
-.macro isr_no_error number
-.global isr\number
-isr\number:
+.macro isrstub
pushall
- cld
+ mov 0x88(%rsp), %rsi
mov %rsp, panic_rsp
- call isr\number\()_handler
+ cld
+ call isr_def_handler
popall
+ add $8, %rsp
iretq
.endm
+.macro isr_no_error number
+.global isr\number
+isr\number:
+ push $0
+ mov $\number, %rdi
+ isrstub
+.endm
+
.macro isr_error number
.global isr\number
isr\number:
+ mov $\number, %rdi
+ isrstub
+.endm
+
+.macro irq number
+.global irq\number
+irq\number:
pushall
- mov 0x88(%rsp), %rdi
- cld
+ mov $\number, %rdi
mov %rsp, panic_rsp
- call isr\number\()_handler
+ cld
+ call irq_def_handler
popall
- add $8, %rsp
iretq
.endm
@@ -106,30 +120,6 @@ isr_error 29
isr_error 30
isr_no_error 31
-.macro irq number
-.global irq\number
-irq\number:
- pushall
- cld
- mov %rsp, panic_rsp
- call irq\number\()_handler
- popall
- iretq
-.endm
-
irq 0
irq 1
irq 2
-irq 3
-irq 4
-irq 5
-irq 6
-irq 7
-irq 8
-irq 9
-irq 10
-irq 11
-irq 12
-irq 13
-irq 14
-irq 15
diff --git a/kernel/src/cpu/pic.c b/kernel/src/cpu/pic.c
index ceb6e11..83bb524 100644
--- a/kernel/src/cpu/pic.c
+++ b/kernel/src/cpu/pic.c
@@ -3,22 +3,18 @@
void remap_pic(void)
{
- // save masks
-// uint8_t a1 = inb(PIC1_DATA);
-// uint8_t a2 = inb(PIC2_DATA);
-
// starts the initialization sequence (in cascade mode)
outb(PIC1_COMMAND, ICW1_INIT | ICW1_ICW4);
outb(PIC2_COMMAND, ICW1_INIT | ICW1_ICW4);
- outb(PIC1_DATA, 0x20); // ICW2: Master PIC vector offset
- outb(PIC2_DATA, 0x28); // ICW2: Slave PIC vector offset
+ outb(PIC1_DATA, 0xe0); // ICW2: Master PIC vector offset
+ outb(PIC2_DATA, 0xe8); // ICW2: Slave PIC vector offset
outb(PIC1_DATA, 4); // ICW3: tell Master PIC that there is a slave PIC at IRQ2 (0000 0100)
outb(PIC2_DATA, 2); // ICW3: tell Slave PIC its cascade identity (0000 0010)
outb(PIC1_DATA, ICW4_8086);
outb(PIC2_DATA, ICW4_8086);
- // mask interrupts
- outb(PIC1_DATA, 0xfc);
+ // mask all interrupts
+ outb(PIC1_DATA, 0xff);
outb(PIC2_DATA, 0xff);
}
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