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-rw-r--r--kernel/src/cpu/gdt.c31
-rw-r--r--kernel/src/cpu/idt.c12
-rw-r--r--kernel/src/cpu/io.c4
-rw-r--r--kernel/src/cpu/irq.c38
-rw-r--r--kernel/src/cpu/kcpuid.c8
-rw-r--r--kernel/src/cpu/msr.c4
-rw-r--r--kernel/src/cpu/pic.c10
-rw-r--r--kernel/src/cpu/tss.c4
8 files changed, 58 insertions, 53 deletions
diff --git a/kernel/src/cpu/gdt.c b/kernel/src/cpu/gdt.c
index 58db962..7460474 100644
--- a/kernel/src/cpu/gdt.c
+++ b/kernel/src/cpu/gdt.c
@@ -4,7 +4,8 @@
gdt_seg_entry gdt[7];
gdt_p gdt_pointer;
-void add_gdt_entry(uint32_t num, uint32_t offset, uint32_t limit, uint8_t access, uint8_t flags)
+void add_gdt_entry(uint32_t num, uint32_t offset, uint32_t limit,
+ uint8_t access, uint8_t flags)
{
gdt[num].offset1 = offset & 0xffff;
gdt[num].offset2 = (offset >> 16) & 0xff;
@@ -15,31 +16,31 @@ void add_gdt_entry(uint32_t num, uint32_t offset, uint32_t limit, uint8_t access
gdt[num].limitflags = (uint8_t)(flags << 4);
}
-void add_gdt_tss(uint32_t num, uint64_t offset, uint32_t limit, uint8_t access, uint8_t flags)
+void add_gdt_tss(uint32_t num, uint64_t offset, uint32_t limit, uint8_t access,
+ uint8_t flags)
{
uint32_t offset_low = (offset & 0xffffffff);
uint32_t offset_high = (uint32_t)(offset >> 32);
add_gdt_entry(num, offset_low, limit, access, flags);
- gdt[num+1].limit = (offset_high & 0xffff);
- gdt[num+1].offset1 = (uint16_t)(offset_high >> 16);
+ gdt[num + 1].limit = (offset_high & 0xffff);
+ gdt[num + 1].offset1 = (uint16_t)(offset_high >> 16);
}
void reload_gdt()
{
- __asm__ __volatile__ (
- // reload segment registers
- "mov $0x10, %ax;"
- "mov %ax, %ds;"
- "mov %ax, %es;"
- "mov %ax, %ss;"
- "mov %ax, %fs;"
- "mov %ax, %gs;"
- );
+ __asm__ __volatile__(
+ // reload segment registers
+ "mov $0x10, %ax;"
+ "mov %ax, %ds;"
+ "mov %ax, %es;"
+ "mov %ax, %ss;"
+ "mov %ax, %fs;"
+ "mov %ax, %gs;");
}
-void load_gdt(gdt_p* pointer)
+void load_gdt(gdt_p *pointer)
{
- __asm__ __volatile__ ("lgdt (%0);" : : "r"(pointer) : );
+ __asm__ __volatile__("lgdt (%0);" : : "r"(pointer) :);
reload_gdt();
}
diff --git a/kernel/src/cpu/idt.c b/kernel/src/cpu/idt.c
index 1b0fffb..9134d84 100644
--- a/kernel/src/cpu/idt.c
+++ b/kernel/src/cpu/idt.c
@@ -1,5 +1,4 @@
#include <idt.h>
-
#include <irq.h>
#include <pic.h>
@@ -8,17 +7,17 @@ idtp idt_pointer;
void enable_interrupts(void)
{
- __asm__ __volatile__ ("sti;");
+ __asm__ __volatile__("sti;");
}
void disable_interrupts(void)
{
- __asm__ __volatile__ ("cli;");
+ __asm__ __volatile__("cli;");
}
-void load_idt(idtp* pointer)
+void load_idt(idtp *pointer)
{
- __asm__ __volatile__ ("lidt (%0);" : : "r"(pointer) : );
+ __asm__ __volatile__("lidt (%0);" : : "r"(pointer) :);
}
void add_to_idt(uint16_t num, uint64_t offset, uint16_t selector, uint8_t type)
@@ -72,7 +71,8 @@ void init_idt_table(void)
add_to_idt(32, (uint64_t)irq0, GDT_CODE_SEG, INTERRUPT_GATE);
add_to_idt(33, (uint64_t)irq1, GDT_CODE_SEG, INTERRUPT_GATE);
for (size_t i = 34; i < 256; i++) {
- add_to_idt((uint16_t)i, (uint64_t)irq2, GDT_CODE_SEG, INTERRUPT_GATE);
+ add_to_idt((uint16_t)i, (uint64_t)irq2, GDT_CODE_SEG,
+ INTERRUPT_GATE);
}
}
diff --git a/kernel/src/cpu/io.c b/kernel/src/cpu/io.c
index 4b5e5ac..e638ae7 100644
--- a/kernel/src/cpu/io.c
+++ b/kernel/src/cpu/io.c
@@ -4,13 +4,13 @@
uint8_t inb(uint32_t port)
{
uint8_t ret;
- __asm__ __volatile__ ("inb %%dx, %%al;" : "=a"(ret) : "d"(port));
+ __asm__ __volatile__("inb %%dx, %%al;" : "=a"(ret) : "d"(port));
return ret;
}
void outb(uint32_t port, uint8_t value)
{
- __asm__ __volatile__ ("outb %%al, %%dx;" : : "d"(port), "a"(value));
+ __asm__ __volatile__("outb %%al, %%dx;" : : "d"(port), "a"(value));
}
void io_wait(void)
diff --git a/kernel/src/cpu/irq.c b/kernel/src/cpu/irq.c
index e5f811c..5eadd39 100644
--- a/kernel/src/cpu/irq.c
+++ b/kernel/src/cpu/irq.c
@@ -1,6 +1,5 @@
#include <types.h>
#include <irq_handler.h>
-
#include <pic.h>
#include <io.h>
#include <keyboard.h>
@@ -13,7 +12,7 @@
#define PIT 0
-const char* const exception_name[] = {
+const char *const exception_name[] = {
"Divide-by-zero Error",
"Debug",
"Non-maskable Interrupt",
@@ -50,13 +49,13 @@ const char* const exception_name[] = {
void isr_def_handler(uint64_t number, uint64_t error)
{
- switch(number) {
- case 14:
- printf("%s, error: 0x%x\n", exception_name[14], error);
- page_fault(error);
- break;
- default:
- panic("%s, error: 0x%x\n", exception_name[number], error);
+ switch (number) {
+ case 14:
+ printf("%s, error: 0x%x\n", exception_name[14], error);
+ page_fault(error);
+ break;
+ default:
+ panic("%s, error: 0x%x\n", exception_name[number], error);
}
}
@@ -76,17 +75,16 @@ void eoi(uint64_t number)
void irq_def_handler(uint64_t number)
{
- switch(number)
- {
- case 0:
- timer_handler();
- break;
- case 1:
- keyboard_handler();
- break;
- default:
- printf("spurious interrupt\n");
- break;
+ switch (number) {
+ case 0:
+ timer_handler();
+ break;
+ case 1:
+ keyboard_handler();
+ break;
+ default:
+ printf("spurious interrupt\n");
+ break;
}
eoi(number);
}
diff --git a/kernel/src/cpu/kcpuid.c b/kernel/src/cpu/kcpuid.c
index 30a4d3e..c400be4 100644
--- a/kernel/src/cpu/kcpuid.c
+++ b/kernel/src/cpu/kcpuid.c
@@ -1,7 +1,11 @@
#include <types.h>
#include <kcpuid.h>
-void kcpuid(uint32_t func, uint32_t subfunc, CPUIDinfo* info)
+void kcpuid(uint32_t func, uint32_t subfunc, CPUIDinfo *info)
{
- __asm__ __volatile__ ( "cpuid" : "=a"(info->EAX), "=b"(info->EBX), "=c"(info->ECX), "=d"(info->EDX) : "a"(func), "c"(subfunc) : );
+ __asm__ __volatile__("cpuid"
+ : "=a"(info->EAX), "=b"(info->EBX),
+ "=c"(info->ECX), "=d"(info->EDX)
+ : "a"(func), "c"(subfunc)
+ :);
}
diff --git a/kernel/src/cpu/msr.c b/kernel/src/cpu/msr.c
index e904d5f..d61b218 100644
--- a/kernel/src/cpu/msr.c
+++ b/kernel/src/cpu/msr.c
@@ -6,7 +6,7 @@ uint64_t read_msr(uint32_t addr)
uint64_t edx;
uint64_t ecx = addr;
- __asm__ __volatile__ ("rdmsr;" : "=a"(eax), "=d"(edx) : "c"(ecx) :);
+ __asm__ __volatile__("rdmsr;" : "=a"(eax), "=d"(edx) : "c"(ecx) :);
return (edx << 32) | eax;
}
@@ -17,5 +17,5 @@ void write_msr(uint32_t addr, uint64_t value)
uint64_t edx = value >> 32;
uint64_t ecx = addr;
- __asm__ __volatile__ ("wrmsr;" : : "a"(eax), "d"(edx), "c"(ecx) :);
+ __asm__ __volatile__("wrmsr;" : : "a"(eax), "d"(edx), "c"(ecx) :);
}
diff --git a/kernel/src/cpu/pic.c b/kernel/src/cpu/pic.c
index 83bb524..cfcc4d5 100644
--- a/kernel/src/cpu/pic.c
+++ b/kernel/src/cpu/pic.c
@@ -6,10 +6,12 @@ void remap_pic(void)
// starts the initialization sequence (in cascade mode)
outb(PIC1_COMMAND, ICW1_INIT | ICW1_ICW4);
outb(PIC2_COMMAND, ICW1_INIT | ICW1_ICW4);
- outb(PIC1_DATA, 0xe0); // ICW2: Master PIC vector offset
- outb(PIC2_DATA, 0xe8); // ICW2: Slave PIC vector offset
- outb(PIC1_DATA, 4); // ICW3: tell Master PIC that there is a slave PIC at IRQ2 (0000 0100)
- outb(PIC2_DATA, 2); // ICW3: tell Slave PIC its cascade identity (0000 0010)
+ outb(PIC1_DATA, 0xe0); // ICW2: Master PIC vector offset
+ outb(PIC2_DATA, 0xe8); // ICW2: Slave PIC vector offset
+ outb(PIC1_DATA,
+ 4); // ICW3: tell Master PIC that there is a slave PIC at IRQ2 (0000 0100)
+ outb(PIC2_DATA,
+ 2); // ICW3: tell Slave PIC its cascade identity (0000 0010)
outb(PIC1_DATA, ICW4_8086);
outb(PIC2_DATA, ICW4_8086);
diff --git a/kernel/src/cpu/tss.c b/kernel/src/cpu/tss.c
index 03b3475..cdfe2cc 100644
--- a/kernel/src/cpu/tss.c
+++ b/kernel/src/cpu/tss.c
@@ -7,14 +7,14 @@ tss_type tss;
void load_tss()
{
- __asm__ __volatile__ ("push %rax; mov $0x28, %ax; ltr %ax; pop %rax;");
+ __asm__ __volatile__("push %rax; mov $0x28, %ax; ltr %ax; pop %rax;");
}
void init_tss()
{
memset(&tss, 0, sizeof(tss_type));
tss.iopb = sizeof(tss_type);
- uint32_t stack_size = 4096*4;
+ uint32_t stack_size = 4096 * 4;
uint64_t stack = (uint64_t)kalloc(stack_size) + stack_size - 8;
tss.rsp0_low = (uint32_t)stack;
tss.rsp0_high = (uint32_t)(stack >> 32);
generated by cgit v1.2.3 (git 2.46.0) at 2025-12-17 10:35:33 +0000