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authorAleksa Vuckovic <aleksav013@gmail.com>2023-01-28 04:11:57 +0100
committerAleksa Vuckovic <aleksav013@gmail.com>2023-01-28 04:11:57 +0100
commitc53c696286821ad13ab9ec61ed011cfe90e193c0 (patch)
tree6f1da82a70eac1f0e3d2f095dc59b8c5a4ed573e /kernel/src/cpu/pic.c
parent3a63d67c42e2d71efafb8a30f08758bf0a180c39 (diff)
PIC -> APIC, removing boilerplate irq_handlers
Diffstat (limited to 'kernel/src/cpu/pic.c')
-rw-r--r--kernel/src/cpu/pic.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/kernel/src/cpu/pic.c b/kernel/src/cpu/pic.c
index ceb6e11..83bb524 100644
--- a/kernel/src/cpu/pic.c
+++ b/kernel/src/cpu/pic.c
@@ -3,22 +3,18 @@
void remap_pic(void)
{
- // save masks
-// uint8_t a1 = inb(PIC1_DATA);
-// uint8_t a2 = inb(PIC2_DATA);
-
// starts the initialization sequence (in cascade mode)
outb(PIC1_COMMAND, ICW1_INIT | ICW1_ICW4);
outb(PIC2_COMMAND, ICW1_INIT | ICW1_ICW4);
- outb(PIC1_DATA, 0x20); // ICW2: Master PIC vector offset
- outb(PIC2_DATA, 0x28); // ICW2: Slave PIC vector offset
+ outb(PIC1_DATA, 0xe0); // ICW2: Master PIC vector offset
+ outb(PIC2_DATA, 0xe8); // ICW2: Slave PIC vector offset
outb(PIC1_DATA, 4); // ICW3: tell Master PIC that there is a slave PIC at IRQ2 (0000 0100)
outb(PIC2_DATA, 2); // ICW3: tell Slave PIC its cascade identity (0000 0010)
outb(PIC1_DATA, ICW4_8086);
outb(PIC2_DATA, ICW4_8086);
- // mask interrupts
- outb(PIC1_DATA, 0xfc);
+ // mask all interrupts
+ outb(PIC1_DATA, 0xff);
outb(PIC2_DATA, 0xff);
}