ANSI C: volatile -> __volatile__

2 files changed, 19 insertions, 20 deletions

diff --git a/kernel/src/apic/apic.c b/kernel/src/apic/apic.c
index 7fa57bf..3dff70f 100644
--- a/kernel/src/apic/apic.c
+++ b/kernel/src/apic/apic.c
@@ -21,7 +21,7 @@ uint8_t curr_cpu_apic_id()
 //	CpuId(1, 0, &info);
 //	return (uint8_t)(info.EBX >> 24);
 
-	return (uint8_t)(((*((volatile uint32_t*)((uint64_t)lapic_addr + 0x20))) >> 24) & 0xFF);
+	return (uint8_t)(((*((__volatile__ uint32_t*)((uint64_t)lapic_addr + 0x20))) >> 24) & 0xFF);
 }
 
 void init_ap_cpus()
@@ -39,19 +39,19 @@ void init_ap_cpus()
 		// send INIT IPI
 
 		// clear APIC errors
-		*((volatile uint32_t*)(lapic_addr + 0x280)) = 0;
+		*((__volatile__ uint32_t*)(lapic_addr + 0x280)) = 0;
 		// select AP
-		*((volatile uint32_t*)(lapic_addr + 0x310)) = (*((volatile uint32_t*)(lapic_addr + 0x310)) & 0x00ffffff) | ((uint32_t)cpu_apic_ids[i] << 24);
+		*((__volatile__ uint32_t*)(lapic_addr + 0x310)) = (*((__volatile__ uint32_t*)(lapic_addr + 0x310)) & 0x00ffffff) | ((uint32_t)cpu_apic_ids[i] << 24);
 		// trigger INIT IPI
-		*((volatile uint32_t*)(lapic_addr + 0x300)) = (*((volatile uint32_t*)(lapic_addr + 0x300)) & 0xfff00000) | 0x00C500;
+		*((__volatile__ uint32_t*)(lapic_addr + 0x300)) = (*((__volatile__ uint32_t*)(lapic_addr + 0x300)) & 0xfff00000) | 0x00C500;
 		// wait for delivery
-		do { __asm__ __volatile__ ("pause" : : : "memory"); }while(*((volatile uint32_t*)(uint64_t)(lapic_addr + 0x300)) & (1 << 12));
+		do { __asm__ __volatile__ ("pause" : : : "memory"); }while(*((__volatile__ uint32_t*)(uint64_t)(lapic_addr + 0x300)) & (1 << 12));
 		// select AP
-		*((volatile uint32_t*)(lapic_addr + 0x310)) = (*((volatile uint32_t*)(lapic_addr + 0x310)) & 0x00ffffff) | ((uint32_t)cpu_apic_ids[i] << 24);
+		*((__volatile__ uint32_t*)(lapic_addr + 0x310)) = (*((__volatile__ uint32_t*)(lapic_addr + 0x310)) & 0x00ffffff) | ((uint32_t)cpu_apic_ids[i] << 24);
 		// deassert
-		*((volatile uint32_t*)(lapic_addr + 0x300)) = (*((volatile uint32_t*)(lapic_addr + 0x300)) & 0xfff00000) | 0x008500;
+		*((__volatile__ uint32_t*)(lapic_addr + 0x300)) = (*((__volatile__ uint32_t*)(lapic_addr + 0x300)) & 0xfff00000) | 0x008500;
 		// wait for delivery
-		do { __asm__ __volatile__ ("pause" : : : "memory"); }while(*((volatile uint32_t*)(uint64_t)(lapic_addr + 0x300)) & (1 << 12));
+		do { __asm__ __volatile__ ("pause" : : : "memory"); }while(*((__volatile__ uint32_t*)(uint64_t)(lapic_addr + 0x300)) & (1 << 12));
 		// wait 10 msec
 		wait(10);
 
@@ -59,15 +59,15 @@ void init_ap_cpus()
 
 		for(size_t j = 0; j < 2; j++) {
 			// clear APIC errors
-			*((volatile uint32_t*)(lapic_addr + 0x280)) = 0;
+			*((__volatile__ uint32_t*)(lapic_addr + 0x280)) = 0;
 			// select AP
-			*((volatile uint32_t*)(lapic_addr + 0x310)) = (*((volatile uint32_t*)(lapic_addr + 0x310)) & 0x00ffffff) | ((uint32_t)cpu_apic_ids[i] << 24);
+			*((__volatile__ uint32_t*)(lapic_addr + 0x310)) = (*((__volatile__ uint32_t*)(lapic_addr + 0x310)) & 0x00ffffff) | ((uint32_t)cpu_apic_ids[i] << 24);
 			// trigger STARTUP IPI for 0800:0000
-			*((volatile uint32_t*)(lapic_addr + 0x300)) = (*((volatile uint32_t*)(lapic_addr + 0x300)) & 0xfff0f800) | 0x000608;
+			*((__volatile__ uint32_t*)(lapic_addr + 0x300)) = (*((__volatile__ uint32_t*)(lapic_addr + 0x300)) & 0xfff0f800) | 0x000608;
 			// wait 200 usec
 			wait(1);
 			// wait for delivery
-			do { __asm__ __volatile__ ("pause" : : : "memory"); }while(*((volatile uint32_t*)(uint64_t)(lapic_addr + 0x300)) & (1 << 12));
+			do { __asm__ __volatile__ ("pause" : : : "memory"); }while(*((__volatile__ uint32_t*)(uint64_t)(lapic_addr + 0x300)) & (1 << 12));
 		}
 	}
 
diff --git a/kernel/src/apic/ioapic.c b/kernel/src/apic/ioapic.c
index 4c3fd69..1322c47 100644
--- a/kernel/src/apic/ioapic.c
+++ b/kernel/src/apic/ioapic.c
@@ -3,26 +3,27 @@
 #include <paging.h>
 #include <libk/stdio.h>
 #include <msr.h>
+#include <idt.h>
 
 void ioapic_eoi()
 {
-	*((volatile uint32_t*)((uint64_t)lapic_addr + 0xB0)) = 0;
+	*((__volatile__ uint32_t*)((uint64_t)lapic_addr + 0xB0)) = 0;
 }
 
 uint32_t ioapic_read(const uint8_t offset)
 {
     /* tell IOREGSEL where we want to read from */
-    *(volatile uint32_t*)(uint64_t)ioapic_addr = offset;
+    *(__volatile__ uint32_t*)(uint64_t)ioapic_addr = offset;
     /* return the data from IOWIN */
-    return *(volatile uint32_t*)((uint64_t)ioapic_addr + 0x10);
+    return *(__volatile__ uint32_t*)((uint64_t)ioapic_addr + 0x10);
 }
 
 void ioapic_write(const uint8_t offset, const uint32_t val)
 {
     /* tell IOREGSEL where we want to write to */
-    *(volatile uint32_t*)(uint64_t)ioapic_addr = offset;
+    *(__volatile__ uint32_t*)(uint64_t)ioapic_addr = offset;
     /* write the value to IOWIN */
-    *(volatile uint32_t*)((uint64_t)ioapic_addr + 0x10) = val;
+    *(__volatile__ uint32_t*)((uint64_t)ioapic_addr + 0x10) = val;
 }
 
 void ioapic_set_irq(uint8_t irq, uint64_t apic_id, uint8_t vector)
@@ -68,7 +69,5 @@ void apic_remap_interrupts()
 	ioapic_set_irq(0x1, bspid, 0x21); // keyboard
 
 	write_msr(APIC_BASE_MSR, read_msr(APIC_BASE_MSR) | (1<<11));
-	*((volatile uint32_t*)(lapic_addr + 0xF0)) = (*(volatile uint32_t*)(lapic_addr + 0xF0) | 0x1FF );
-
-	__asm__ volatile ("sti;");
+	*((__volatile__ uint32_t*)(lapic_addr + 0xF0)) = (*(__volatile__ uint32_t*)(lapic_addr + 0xF0) | 0x1FF );
 }