From 36137438446c1754a522c5b3cc3aff92c43ac1ee Mon Sep 17 00:00:00 2001
From: Aleksa Vuckovic <aleksa@vuckovic.cc>
Date: Wed, 13 Dec 2023 01:38:14 +0100
Subject: Initial commit X86/X86_64 debug/release WORKING

riscv64 WORKING uart

idk
---
 arch/riscv64.ld | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 arch/riscv64.ld

(limited to 'arch/riscv64.ld')

diff --git a/arch/riscv64.ld b/arch/riscv64.ld
new file mode 100644
index 0000000..cad0f07
--- /dev/null
+++ b/arch/riscv64.ld
@@ -0,0 +1,25 @@
+ENTRY(start);
+
+. = 0x80200000;
+
+SECTIONS {
+	.text : ALIGN(4K) {
+		*(.init);
+		*(.text);
+	}
+	.bss : ALIGN(4K) {
+		PROVIDE(bss_start = .);
+		*(.bss);
+		. += 4096;
+		PROVIDE(stack_top = .);
+		. += 4096;
+		PROVIDE(global_pointer = .);
+		PROVIDE(bss_end = .);
+	}
+	.rodata : ALIGN(4K) {
+		*(.rodata);
+	}
+	.data : ALIGN(4K) {
+		*(.data);
+	}
+}
-- 
cgit v1.2.3