From 6e9b3275d75e0cdbae1e8f7e4dda8880bb6346bc Mon Sep 17 00:00:00 2001
From: Aleksa Vuckovic <aleksav013@gmail.com>
Date: Sat, 3 Sep 2022 23:53:53 +0200
Subject: gdt & tss

---
 kernel/src/cpu/gdt.c      | 53 +++++++++++++++++++++++++++++++++++++++++++++++
 kernel/src/cpu/irq.c      |  5 +++--
 kernel/src/cpu/irq_stub.S |  4 +---
 kernel/src/cpu/tss.c      | 15 ++++++++++++++
 4 files changed, 72 insertions(+), 5 deletions(-)
 create mode 100644 kernel/src/cpu/gdt.c
 create mode 100644 kernel/src/cpu/tss.c

(limited to 'kernel/src/cpu')

diff --git a/kernel/src/cpu/gdt.c b/kernel/src/cpu/gdt.c
new file mode 100644
index 0000000..b4f1ec0
--- /dev/null
+++ b/kernel/src/cpu/gdt.c
@@ -0,0 +1,53 @@
+#include <gdt.h>
+#include <tss.h>
+
+gdt_seg_entry gdt[7];
+gdt_p gdt_pointer;
+
+void add_gdt_entry(uint32_t num, uint32_t offset, uint32_t limit, uint8_t access, uint8_t flags)
+{
+	gdt[num].offset1 = offset & 0xffff;
+	gdt[num].offset2 = (offset >> 16) & 0xff;
+	gdt[num].offset3 = (uint8_t)(offset >> 24) & 0xff;
+	gdt[num].limit = limit & 0xffff;
+	gdt[num].limitflags = (limit >> 16) & 0xf;
+	gdt[num].access = access;
+	gdt[num].limitflags = flags << 4;
+}
+
+void add_gdt_tss(uint32_t num, uint64_t offset, uint32_t limit, uint8_t access, uint8_t flags)
+{
+	add_gdt_entry(num, offset & 0xffffffff, limit, access, flags);
+}
+
+void reload_gdt()
+{
+	__asm__ volatile (
+			"mov $0x10, %ax;"
+			"mov %ax, %ds;"
+			"mov %ax, %es;"
+			"mov %ax, %ss;"
+			);
+}
+
+void load_gdt(gdt_p* pointer)
+{
+	__asm__ volatile ("lgdt (%0);" : : "r"(pointer) : );
+	reload_gdt();
+}
+
+void init_gdt()
+{
+	gdt_pointer.offset = (uint64_t)&gdt;
+	gdt_pointer.size = sizeof(gdt) - 1;
+
+	add_gdt_entry(0, 0, 0, 0, 0);
+	add_gdt_entry(1, 0, 0xfffff, 0x9a, 0xa);
+	add_gdt_entry(2, 0, 0xfffff, 0x92, 0xc);
+	add_gdt_entry(3, 0, 0xfffff, 0xfa, 0xa);
+	add_gdt_entry(4, 0, 0xfffff, 0xf2, 0xc);
+	add_gdt_tss(5, (uint64_t)&tss, sizeof(tss_type), 0x89, 0);
+
+	load_gdt(&gdt_pointer);
+	init_tss();
+}
diff --git a/kernel/src/cpu/irq.c b/kernel/src/cpu/irq.c
index 096860a..a19a7f1 100644
--- a/kernel/src/cpu/irq.c
+++ b/kernel/src/cpu/irq.c
@@ -8,7 +8,7 @@
 #include <paging.h>
 #include <libk/stdio.h>
 
-const char* exception_name[] = {
+const char* const exception_name[] = {
 	"Divide-by-zero Error",
 	"Debug",
 	"Non-maskable Interrupt",
@@ -120,8 +120,9 @@ void isr13_handler(uint64_t error)
 
 void isr14_handler(uint64_t error)
 {
-	page_fault(error);
 	printf("%s\n", exception_name[14]);
+	printf("error: %d\n", error);
+	page_fault(error);
 }
 
 void isr15_handler(void)
diff --git a/kernel/src/cpu/irq_stub.S b/kernel/src/cpu/irq_stub.S
index 4db722e..9b2b2d8 100644
--- a/kernel/src/cpu/irq_stub.S
+++ b/kernel/src/cpu/irq_stub.S
@@ -38,11 +38,9 @@ isr\number:
 .macro isr_error number
 .global isr\number
 isr\number:
-	add $8, %rsp
+	pop %rdi
 	pushall
 	cld
-	# setting error to 0
-	mov $0, %rdi
 	call isr\number\()_handler
 	popall
 	iretq
diff --git a/kernel/src/cpu/tss.c b/kernel/src/cpu/tss.c
new file mode 100644
index 0000000..c7f9dc2
--- /dev/null
+++ b/kernel/src/cpu/tss.c
@@ -0,0 +1,15 @@
+#include <tss.h>
+
+tss_type tss;
+
+void load_tss()
+{
+	__asm__ volatile ("mov $0x28, %ax; ltr %ax;");
+}
+
+void init_tss()
+{
+	tss.iopb = sizeof(tss_type);
+
+	load_tss();
+}
-- 
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