From 57e6722453c27d35a3b02309ce21263d225a23e3 Mon Sep 17 00:00:00 2001
From: Aleksa Vuckovic <aleksa@vuckovic.cc>
Date: Wed, 22 Feb 2023 17:31:52 +0100
Subject: curr_cpu_apic_id() now works on old amd cpus

---
 kernel/src/apic/ioapic.c | 7 +++++++
 1 file changed, 7 insertions(+)

(limited to 'kernel/src/apic/ioapic.c')

diff --git a/kernel/src/apic/ioapic.c b/kernel/src/apic/ioapic.c
index a8c3452..73c58d0 100644
--- a/kernel/src/apic/ioapic.c
+++ b/kernel/src/apic/ioapic.c
@@ -2,6 +2,7 @@
 #include <apic.h>
 #include <paging.h>
 #include <libk/stdio.h>
+#include <msr.h>
 
 void ioapic_eoi()
 {
@@ -53,6 +54,8 @@ void ioapic_set_irq(uint8_t irq, uint64_t apic_id, uint8_t vector)
 	ioapic_write((uint8_t)low_index, low);
 }
 
+#define APIC_BASE_MSR 0x0000001B
+
 void apic_remap_interrupts()
 {
 	uint8_t bspid = curr_cpu_apic_id();
@@ -63,5 +66,9 @@ void apic_remap_interrupts()
 	// irq is 2 because of gsi remap
 	ioapic_set_irq(0x2, bspid, 0x20); // timer
 	ioapic_set_irq(0x1, bspid, 0x21); // keyboard
+
+	write_msr(APIC_BASE_MSR, read_msr(APIC_BASE_MSR) | (1<<11));
+	*((volatile uint32_t*)(lapic_addr + 0xF0)) = (*(volatile uint32_t*)(lapic_addr + 0xF0) | 0x1FF );
+
 	__asm__ volatile ("sti;");
 }
-- 
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